Fin field-effect transistor (FinFET) devices include a transistor architecture that uses raised source-to-drain channel regions, referred to as fins. A FinFET device can be built on a semiconductor substrate, where a semiconductor material, such as silicon, is patterned into fin-like shapes and functions as the channels of the transistors.
Known methods for manufacturing dual channel FinFET devices include etching channels for p-type field-effect transistors (PFETs) and n-type field-effect transistors (NFETs) during the same reactive ion etch (RIE) step. In a case where NFET fins comprise silicon (Si) and PFET fins comprise silicon germanium (SiGe), there is a variation of fin critical dimensions (CDs) between NFET and PFET devices due to the dissimilar etch rates between Si and SiGe. The variation results in undesirable electrical properties for the resulting transistors.